AON7452 100v n-channel mosfet sdmos tm general description product summary v ds i d (at v gs =10v) 5.5a r ds(on) (at v gs =10v) < 310m w r ds(on) (at v gs =7v) < 370m w 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc max t c =25c 3.1 7 t c =100c c thermal characteristics units maximum junction-to-ambient a c/w r q ja 30 60 parameter typ 40 v 25 gate-source voltage avalanche energy l=0.1mh c mj avalanche current c 2 junction and storage temperature range -55 to 150 the AON7452 is fabricated with sdmos tm trench technology that combines excellent r ds(on) with low gate charge and low qrr.the result is outstanding effici ency with controlled switching behavior. this universal technology is well suited for pwm, load switching a nd general purpose applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v drain-source voltage 100 a t a =25c i dsm a t a =70c 12 pulsed drain current c continuous drain current continuous drain current 0.3 2.5 a 2.5 i d 5.5 3.5 t c =25c t c =100c w power dissipation a p dsm w t a =70c 17 2 t a =25c power dissipation b p d maximum junction-to-case c/w c/w maximum junction-to-ambient a d 6 75 7.2 g ds top view 12 3 4 8 76 5 dfn 3x3 ep top view bottom view pin 1 rev 1: april 2011 www.aosmd.com page 1 of 7
AON7452 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 10 t j =55c 50 i gss 100 na v gs(th) gate threshold voltage 3.3 4 4.7 v i d(on) 12 a 255 310 t j =125c 404 485 296 370 m w g fs 3.5 s v sd 0.8 1 v i s 15 a c iss 125 155 185 pf c oss 20 28 36 pf c rss 5 9 13 pf r g 1 2 3 w q g (10v) 2.4 3 4 nc q gs 1 1.3 1.6 nc q gd 0.5 0.9 1.3 nc t d(on) 4 ns t r 4.5 ns t d(off) 8.5 ns t f 2 ns t rr 6.7 9.6 13 ns q rr 16 23 30 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =2.5a, di/dt=500a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime forward transconductance diode forward voltage v gs =10v, v ds =50v, r l =20 w , r gen =3 w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =50v, i d =2.5a gate source charge gate drain charge m w i s =1a,v gs =0v v ds =5v, i d =2.5a v gs =7v, i d =2a m a v ds =v gs i d =250 m a v ds =0v, v gs = 25v zero gate voltage drain current gate-body leakage current v gs =10v, i d =2.5a r ds(on) static drain-source on-resistance i dss drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions reverse transfer capacitance i f =2.5a, di/dt=500a/ m s v gs =0v, v ds =50v, f=1mhz switching parameters body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the power dissipation p dsm is based on r q ja t 10s value and the maximum allowed junction tempera ture of 150c. the value in any given application depends on the user's specific board de sign, and the maximum temperature of 150c may be u sed if the pcb allows it. b. the power dissipation p d is based on t j(max) =150c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r q ja is the sum of the thermal impedence from junction to case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse ratin g. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. rev 1: april 2011 www.aosmd.com page 2 of 7
AON7452 typical electrical and thermal characteristics 17 52 10 0 18 40 0 1 2 3 4 5 2 3 4 5 6 7 8 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 0 200 400 600 800 0 1 2 3 4 5 6 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =7v i d =2a v gs =10v i d =2.5a 150 200 250 300 350 400 450 500 550 5 6 7 8 9 10 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =5v v gs =7v v gs =10v i d =2.5a 25c 125c 0 2 4 6 8 10 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =5.5v 6v 10v 6.5v 7v rev 1: april 2011 www.aosmd.com page 3 of 7
AON7452 typical electrical and thermal characteristics 17 52 10 0 18 40 0 2 4 6 8 10 0 0.5 1 1.5 2 2.5 3 3.5 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 50 100 150 200 250 0 10 20 30 40 50 60 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) z q qq q jc normalized transient thermal resistance c oss c rss v ds =50v i d =2.5a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t c =25c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 1000 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150c t c =25c 100 m s r q jc =7.2c/w rev 1: april 2011 www.aosmd.com page 4 of 7
AON7452 typical electrical and thermal characteristics 17 52 10 0 18 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 15: normalized maximum transient thermal imp edance (note h) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 5 10 15 20 0 25 50 75 100 125 150 t case (c) figure 12: power de-rating (note f) power dissipation (w) 0 1 2 3 4 5 6 0 25 50 75 100 125 150 t case (c) figure 13: current de-rating (note f) current rating i d (a) 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 14: single pulse power rating junction-to-am bient (note h) power (w) t a =25c r q ja =75c/w rev 1: april 2011 www.aosmd.com page 5 of 7
AON7452 typical electrical and thermal characteristics 0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 i s (a) figure 16: diode reverse recovery charge and peak current vs. conduction current q rr (nc) 0 2 4 6 8 10 12 14 i rm (a) di/dt=500a/ m s 125oc 125oc 25oc 25oc q rr i rm 0 10 20 30 40 50 300 400 500 600 700 di/dt (a/ m mm m s) figure 18: diode reverse recovery charge and peak current vs. di/dt q rr (nc) 0 5 10 15 20 25 i rm (a) 125oc 125oc 25oc 25oc i s =4a q rr i rm 0 4 8 12 16 0 2 4 6 8 i s (a) figure 17: diode reverse recovery time and softness factor vs. conduction current t rr (ns) 0 0.5 1 1.5 2 2.5 3 s di/dt=500a/ m s 125oc 125oc 25oc 25oc t rr s 0 5 10 15 300 400 500 600 700 di/dt (a/ m mm m s) figure 19: diode reverse recovery time and softness factor vs. di/dt t rr (ns) 0 0.5 1 1.5 2 2.5 s 125oc 25oc 25oc 125o i s =4a t rr s rev 1: april 2011 www.aosmd.com page 6 of 7
AON7452 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 1: april 2011 www.aosmd.com page 7 of 7
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